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Bibliography

  1. Marlin, C. D. 1980. Coroutines: A Programming Methodology, a Language Design and an Implementation.
    LNCS 95, Springer-Verlag.

  2. Ousterhout, J. K. 1996. Why Threads Are A Bad Idea (for most purposes).
    Presentation given at the 1996 Usenix Annual Technical Conference, January 1996.

  3. Kegel, D 1999-2006. The C10K problem.

    High quality web resource about scalability of highly concurrent Internet services. Provides a detailed analysis benefits and caveats of both threaded and event driven designs, plus pointers to many other web resources and papers. http://www.kegel.com/c10k.html.

  4. Adya, A., Howell, J., Theimer, M., Bolosky, W. J., and Doucer, J. R. 2002. Cooperative Task Management without Manual Stack Management.
    In Proceedings of USENIX Annual Technical Conference. USENIX, Monterey, CA.

  5. Behren, R., Condit, J., and Brewer, E. 2003. Why Events are a Bad Idea (for high- concurrency servers).
    In Proceedings of the 9th Workshop on Hot Topics in Operating Systems (HotOS IX). Lihue, HI.

  6. Moura, A. L., Ierusalimschy R. 2004. Revisiting Coroutines.

    In 32 pages describes coroutines, demonstrates their equivalence to continuation, shows the Lua coroutine interface and gives high quality examples of coroutine usage. Highly recommended read. Available at www.inf.puc-rio.br/~roberto/docs/MCC15-04.pdf.

  7. Saboff, M 2003. Implementing User Level Threading on the Intel Itanium Architecture.

    Explains why setjmp/longjmp cannot be used to implement coroutines on the Itanium architecture and then describe an alternative implementation.

  8. Fog, A 2006. Microarchitecture of Intel and AMD CPU's. An optimization guide for assembly programmers and compiler makers.

    Probably the best in-depth guide about optimizing for the IA-32 and IA-32E architecture. Available at http://www.agner.org/optimize/

  9. Intel, 2006. IA-32 Intel Architecture Optimization Reference Manual. Order number: 248066-013US.

Copyright 2006 Giovanni P. Deretta

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